A Study On Circuit Design Of Integrated Cmos Analog Matched Filter

Abstract

In spread spectrum communication receivers a matched filter can be used as the correlator for acquisition and tracking of synchronization. For a mobile communication terminals large power consumption of the matched filter is serious problem because total power consumption is limited. We proposed a new analog matched filter using sample-and-hold (S/H) circuit, which performs correlation operation in fully analog domain, eliminating the need to analog-to-digital (A/D) conversion, so reduces power consumption and chip area. The simulation result shows the proposed analog matched filter would achieve 2.22mW power consumption at a chip rate of 16.67MHz with 3.3V power supply for 15 taps configuration. The proposed analog architecture could improve the performance of mobile terminals