{"title":"A new programmable ALU architecture for hard-core processor","authors":"Hajer Najjar, R. Bourguiba, Jaouhar Mouine","doi":"10.1109/SSD.2016.7473751","DOIUrl":null,"url":null,"abstract":"Hard-core processors are known to be a very performed in terms of operation frequency, area and power consumption. However, they have fixed design so that, they cannot be reused for different applications. In this paper we propose a new ALU (Arithmetic and Logic Unit) architecture that allows to these processors to be generic propose without losing hard-core performances.","PeriodicalId":149580,"journal":{"name":"2016 13th International Multi-Conference on Systems, Signals & Devices (SSD)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-03-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 13th International Multi-Conference on Systems, Signals & Devices (SSD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SSD.2016.7473751","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2
Abstract
Hard-core processors are known to be a very performed in terms of operation frequency, area and power consumption. However, they have fixed design so that, they cannot be reused for different applications. In this paper we propose a new ALU (Arithmetic and Logic Unit) architecture that allows to these processors to be generic propose without losing hard-core performances.
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