{"title":"Optimal Clock Skew Scheduling And Topology Design Tolerant To Delay Uncertainty Using Genetic Algorithms","authors":"S. Hashemi, N. Masoumi, C. Lucas","doi":"10.1109/MIXDES.2006.1706632","DOIUrl":null,"url":null,"abstract":"This paper presents an optimal clock skew scheduling tolerant to delay uncertainty by using genetic algorithms. In using genetic algorithm two optimization problems are aimed: 1) clock period minimization and 2) tolerance maximization to the delay uncertainty due to the process and environmental parameters variations (PEPV). Application of the proposed clock skew scheduling and topology design on the test circuits demonstrates clock distribution networks with noticeably improved tolerance to delay uncertainty, up to plusmn20% tolerance to power supply variations is reached and the most critical datapath sensitivity to PEPV is improved by a factor of 7, while the system performance degradation is small","PeriodicalId":318768,"journal":{"name":"Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006.","volume":"18 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2006-06-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the International Conference Mixed Design of Integrated Circuits and System, 2006. MIXDES 2006.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MIXDES.2006.1706632","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper presents an optimal clock skew scheduling tolerant to delay uncertainty by using genetic algorithms. In using genetic algorithm two optimization problems are aimed: 1) clock period minimization and 2) tolerance maximization to the delay uncertainty due to the process and environmental parameters variations (PEPV). Application of the proposed clock skew scheduling and topology design on the test circuits demonstrates clock distribution networks with noticeably improved tolerance to delay uncertainty, up to plusmn20% tolerance to power supply variations is reached and the most critical datapath sensitivity to PEPV is improved by a factor of 7, while the system performance degradation is small