{"title":"Universal fused floating-point dot-product unit (UFDP)","authors":"H. Saleh, B. Mohammad","doi":"10.1109/IDT.2013.6727146","DOIUrl":null,"url":null,"abstract":"A universal floating-point fused dot-product (UFDP) unit is presented that is capable of performing floating-point multiplication and addition or subtraction operations on two pairs of data, floating-point multiply add operation on three data items, floating-point multiplication of two data items and floating-point addition or subtraction of two data items. The proposed UFDP unit could be used as the only floating-point primitive a processor needs, where it easily can replace a floating-point adder, multiplier, fused multiply-add and a fused dot-product unit. Due to the dominance of multiply-add and dot-product operations in audio and video processing algorithms this unit can lead to substantial performance enhancement. The synthesis results using 32nm industry standard-cell library shows that the proposed architecture occupies an area of approximately twice a basic floating-point multiplier, can perform all operations in less 160% of a basic floating-point operation and consumes 80% more than a basic floating-point multiplier.","PeriodicalId":446826,"journal":{"name":"2013 8th IEEE Design and Test Symposium","volume":"49 4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 8th IEEE Design and Test Symposium","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IDT.2013.6727146","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
A universal floating-point fused dot-product (UFDP) unit is presented that is capable of performing floating-point multiplication and addition or subtraction operations on two pairs of data, floating-point multiply add operation on three data items, floating-point multiplication of two data items and floating-point addition or subtraction of two data items. The proposed UFDP unit could be used as the only floating-point primitive a processor needs, where it easily can replace a floating-point adder, multiplier, fused multiply-add and a fused dot-product unit. Due to the dominance of multiply-add and dot-product operations in audio and video processing algorithms this unit can lead to substantial performance enhancement. The synthesis results using 32nm industry standard-cell library shows that the proposed architecture occupies an area of approximately twice a basic floating-point multiplier, can perform all operations in less 160% of a basic floating-point operation and consumes 80% more than a basic floating-point multiplier.