CMOS process compatible ie-Flash (inverse gate electrode Flash) technology for system-on-a-chip

Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169) Pub Date : 2001-05-06 DOI:10.1109/CICC.2001.929750

S. Shukuri, K. Yanagisawa, K. Ishibashi

引用次数: 10

Abstract

A highly reliable single-poly flash technology named ie-Flash (inverse gate electrode Flash), which can be embedded in the common 0.14 /spl mu/m CMOS process without any process modifications, has been developed. The ie-Flash cell consists of two elementary cells for OR-logical reading, resulting in significant improvement of reliability. 5 V programming with 1 ms duration and 1.2 V-read operation of 35 bit memory modules fabricated by a 0.14 /spl mu/m CMOS process is demonstrated.

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适用于片上系统的CMOS工艺兼容ie-Flash(反栅电极Flash)技术

开发了一种高可靠性的单聚flash技术，即ie-Flash(逆栅电极flash)，该技术无需任何工艺修改即可嵌入到常见的0.14 /spl μ m CMOS工艺中。ie-Flash单元由两个基本单元组成，用于or逻辑读取，从而显著提高了可靠性。对采用0.14 /spl μ m CMOS工艺制作的35位内存模块进行了5v编程，编程时间为1ms，读取操作为1.2 V。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169)

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