{"title":"Parallelizing of Boolean function system for device simulation","authors":"A. Chemeris, S. Reznikova","doi":"10.1109/EWDTS.2011.6116583","DOIUrl":null,"url":null,"abstract":"The representation of digital circuits that are designed by Boolean functions is considered. The syntax of Boolean function we use is presented. This digital circuit representation in the form of data-flow graph is used as a basis for parallelizing of simulation process for multiprocessor computers.","PeriodicalId":339676,"journal":{"name":"2011 9th East-West Design & Test Symposium (EWDTS)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-09-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 9th East-West Design & Test Symposium (EWDTS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EWDTS.2011.6116583","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
The representation of digital circuits that are designed by Boolean functions is considered. The syntax of Boolean function we use is presented. This digital circuit representation in the form of data-flow graph is used as a basis for parallelizing of simulation process for multiprocessor computers.
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