Communication software synthesis from UML-ESL models

Abstract

The electronic devices market demands a larger amount of functionality integrated into a single product. To address this demand, the industry migrated to solutions based on processors, increasing the software role in the systems. However, processor-based solutions raises the design complexity due to the complexity of Hardware-dependent Software (HdS). To cope with this complexity, the virtual platforms approach is applied, in which the whole system is modeled in order to reduce the design time. Nowadays, much of this work is manually performed, synthesizing all structures and behavior required in a system level design language (SLDL). However, with the increasing systems complexity, it is becoming impractical to continue performing this synthesis manually. In the last decade, several studies have addressed the synthesis of software components from descriptions in SLDLs and recently in the Unified Modeling Language (UML). Although significant automation has been obtained, there are limitations in the abstraction achieved. In order to raise the abstraction of the description, the UML-ESL profile was proposed to abstract the communication structure, with a synthesis technique for communication between software and hardware interfaces. This work presents a technique to synthesize the multitasking support and the communication between software components of the system from a description in UML-ESL for virtual platform simulation. The results obtained showed up to 60% decrease in the amount of code manually written.