A Millimeter-Wave Front-End for FD/FDD Transceivers Featuring an Embedded PA and an N-Path Filter Based Circulator Receiver

Masoud Pashaeifar, L. D. de Vreede, M. Alavi
{"title":"A Millimeter-Wave Front-End for FD/FDD Transceivers Featuring an Embedded PA and an N-Path Filter Based Circulator Receiver","authors":"Masoud Pashaeifar, L. D. de Vreede, M. Alavi","doi":"10.1109/RFIC54546.2022.9863209","DOIUrl":null,"url":null,"abstract":"This work presents an ultra-compact single-antenna FD/FDD transceivers front-end. It comprises a nonreciprocal circulator, RX, and an integrated power amplifier (PA). In the proposed circulator, we devise a ring quarter-wave transmission line topology with adjusted characteristic impedances to improve TX-to-antenna insertion loss and TX-to-RX isolation. Besides, an AND-gate switching-based N-path filter is proposed to realize the circulator's nonreciprocal gyrator while acting as a mixer-first RX. Owing to the ultra-compact N-path filter structure, the circulator occupies only 0.38mm2 core area. Over a 27.1-to-31.1GHz band, the realized front-end offers >20dB TX-to-RX isolation while its measured TX-to-antenna insertion loss is 1.7~2.2dB. The RX path tolerates the PA's blocker signal, achieving 5dBm in-band and 13dBm out-of-band B1dB.Moreover, the PA delivers 15.15dBm peak output power with 33% drain efficiency. Our front-end prototype occupies only 0.7mm2, including circulator, PA, quadrature hybrid coupler LO generators, and baseband circuits.","PeriodicalId":415294,"journal":{"name":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2022-06-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC54546.2022.9863209","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

This work presents an ultra-compact single-antenna FD/FDD transceivers front-end. It comprises a nonreciprocal circulator, RX, and an integrated power amplifier (PA). In the proposed circulator, we devise a ring quarter-wave transmission line topology with adjusted characteristic impedances to improve TX-to-antenna insertion loss and TX-to-RX isolation. Besides, an AND-gate switching-based N-path filter is proposed to realize the circulator's nonreciprocal gyrator while acting as a mixer-first RX. Owing to the ultra-compact N-path filter structure, the circulator occupies only 0.38mm2 core area. Over a 27.1-to-31.1GHz band, the realized front-end offers >20dB TX-to-RX isolation while its measured TX-to-antenna insertion loss is 1.7~2.2dB. The RX path tolerates the PA's blocker signal, achieving 5dBm in-band and 13dBm out-of-band B1dB.Moreover, the PA delivers 15.15dBm peak output power with 33% drain efficiency. Our front-end prototype occupies only 0.7mm2, including circulator, PA, quadrature hybrid coupler LO generators, and baseband circuits.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
一种用于FD/FDD收发器的毫米波前端,具有嵌入式PA和基于n路滤波器的环形接收器
这项工作提出了一个超紧凑的单天线FD/FDD收发器前端。它包括一个非互易环行器RX和一个集成功率放大器(PA)。在所提出的环行器中,我们设计了一种具有可调特性阻抗的环形四分之一波传输线拓扑,以改善txx到天线的插入损耗和txx到rx的隔离。此外,提出了一种基于与门开关的n路滤波器,在充当混频器优先RX的同时实现环行器的非互反旋转器。由于采用了超紧凑的n路滤波器结构,环行器的核心面积仅为0.38mm2。在27.1 ~ 31.1 ghz频段内,实现的前端提供了>20dB的txto - rx隔离,而其测量的txto -天线插入损耗为1.7~2.2dB。RX路径可以容忍PA的阻塞信号,实现5dBm带内和13dBm带外的B1dB。此外,PA的峰值输出功率为15.15dBm,漏极效率为33%。我们的前端原型仅占地0.7mm2,包括环行器,PA,正交混合耦合器LO发生器和基带电路。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
A Compact Single Transformer Footprint Hybrid Current-Voltage Digital Doherty Power Amplifier A 4.2-9.2GHz Cryogenic Transformer Feedback Low Noise Amplifier with 4.5K Noise Temperature and Noise-Power Matching in 22nm CMOS FDSOI A 17 Gb/s 10.7 pJ/b 4FSK Transceiver System for Point to Point Communication in 65 nm CMOS A 60GHz Phased Array Transceiver Chipset in 45nm RF SOI Featuring Channel Aggregation Using HRM-Based Frequency Interleaving A 320μW Receiver with -58dB SIR Leveraging a Time-Varying N-Path Filter
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1