On diagnosis of faults in a scan-chain

S. Kundu
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引用次数: 66

Abstract

Testing screens for good chips. However, when test fall out is high (low yield) it becomes necessary to diagnose faults so that the manufacturing process or physical design can be fixed to improve yield. Several scan based diagnostic schemes are used in industry. They work when the scan chain itself is fault free. This paper describes a diagnosis system that can diagnose faults in a scan chain.<>
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扫描链故障的诊断
测试屏幕,寻找好的芯片。然而,当测试落点高(低良率)时,就有必要诊断故障,以便可以修复制造工艺或物理设计以提高良率。工业上使用了几种基于扫描的诊断方案。当扫描链本身没有故障时,它们就会工作。本文介绍了一种能够对扫描链中的故障进行诊断的诊断系统。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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Classification of bridging faults in CMOS circuits: experimental results and implications for test Generation of testable designs from behavioral descriptions using high level synthesis tools Carafe: an inductive fault analysis tool for CMOS VLSI circuits Partial scan testing with single clock control Revisiting shift register realization for ease of test generation and testing
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