{"title":"An adaptive reference generation scheme for 1T1C FeRAMs","authors":"T. Chandler, A. Sheikholeslami, S. Masui, M. Oura","doi":"10.1109/VLSIC.2003.1221193","DOIUrl":null,"url":null,"abstract":"A reference time, instead of a reference voltage, is generated used to compare stored \"0\" and \"1\" in a race of bitlines towards reaching a threshold voltage in a 1T1C FeRAM. The reference time is adaptive, tracking process variations, aging, and fatigue of ferroelectric capacitors. This scheme is implemented in a 256/spl times/128-bit testchip in a 0.35 /spl mu/m ferroelectric process and achieves a 40 ns access time at 3 V.","PeriodicalId":270304,"journal":{"name":"2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIC.2003.1221193","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8
Abstract
A reference time, instead of a reference voltage, is generated used to compare stored "0" and "1" in a race of bitlines towards reaching a threshold voltage in a 1T1C FeRAM. The reference time is adaptive, tracking process variations, aging, and fatigue of ferroelectric capacitors. This scheme is implemented in a 256/spl times/128-bit testchip in a 0.35 /spl mu/m ferroelectric process and achieves a 40 ns access time at 3 V.
京公网安备 11010802042870号
京ICP备2023020795号-1
分享
求助内容：
应助结果提醒方式：
扫码关注我们
