{"title":"Design and analysis of novel fuzzifer circuits in CMOS current mode approach","authors":"A. Gubbi, M. Deeksha","doi":"10.1109/VLSI-SATA.2016.7593035","DOIUrl":null,"url":null,"abstract":"In this paper, the hardware realization of the basic blocks of Fuzzy Inference System (FIS) using simplified inference mechanism circuits are designed and tested in Complementary Metal Oxide Semiconductor (CMOS) Current Mode (CM). These circuits are useful in fuzzy and neuro-fuzzy systems. FIS consists of three main functional blocks. The fuzzification block using Membership Function Generator Circuit (MFGC), rule evaluation and defuzzification. The circuits are designed using the Cadence Virtuoso Design environment in 180nm technology and tested using the Spectre tool. The responses of the circuits, for variations in different signal values are represented using characteristics obtained from spectre tool. The circuit delays and average power are calculated from transient responses with simulation matching the mathematical calculation.","PeriodicalId":328401,"journal":{"name":"2016 International Conference on VLSI Systems, Architectures, Technology and Applications (VLSI-SATA)","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 International Conference on VLSI Systems, Architectures, Technology and Applications (VLSI-SATA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSI-SATA.2016.7593035","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
In this paper, the hardware realization of the basic blocks of Fuzzy Inference System (FIS) using simplified inference mechanism circuits are designed and tested in Complementary Metal Oxide Semiconductor (CMOS) Current Mode (CM). These circuits are useful in fuzzy and neuro-fuzzy systems. FIS consists of three main functional blocks. The fuzzification block using Membership Function Generator Circuit (MFGC), rule evaluation and defuzzification. The circuits are designed using the Cadence Virtuoso Design environment in 180nm technology and tested using the Spectre tool. The responses of the circuits, for variations in different signal values are represented using characteristics obtained from spectre tool. The circuit delays and average power are calculated from transient responses with simulation matching the mathematical calculation.
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