{"title":"A novel current-mode Winner-Take-All topology","authors":"D. Moro-Frías, M. T. Sanz, C. A. D. L. Cruz-Blas","doi":"10.1109/ECCTD.2011.6043295","DOIUrl":null,"url":null,"abstract":"In this paper a novel Winner-Take-All (WTA) topology is presented which shows good trade-off between resolution and resolution speed, at the cost of some increase in power consumption. The proposed WTA is compared with other current-mode WTAs found in literature based on the same operation principle. All the topologies were designed in a 0.13µm CMOS process and characterized in terms of resolution, resolution speed, supply voltage, compactness and power consumption. The novel WTA shows the highest resolution speed and the best trade-off between performance parameters.","PeriodicalId":126960,"journal":{"name":"2011 20th European Conference on Circuit Theory and Design (ECCTD)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 20th European Conference on Circuit Theory and Design (ECCTD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECCTD.2011.6043295","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
In this paper a novel Winner-Take-All (WTA) topology is presented which shows good trade-off between resolution and resolution speed, at the cost of some increase in power consumption. The proposed WTA is compared with other current-mode WTAs found in literature based on the same operation principle. All the topologies were designed in a 0.13µm CMOS process and characterized in terms of resolution, resolution speed, supply voltage, compactness and power consumption. The novel WTA shows the highest resolution speed and the best trade-off between performance parameters.
本文提出了一种新的赢家通吃(WTA)拓扑结构，它在分辨率和分辨率速度之间取得了很好的平衡，但代价是功耗的增加。基于相同的工作原理，将所提出的WTA与文献中发现的其他电流模式WTA进行了比较。所有拓扑结构均采用0.13 μ m CMOS工艺设计，并在分辨率、分辨率速度、电源电压、紧凑性和功耗方面进行了表征。新的WTA显示出最高的分辨率速度和性能参数之间的最佳权衡。
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