SLC and MLC In-Memory-Approximate-Search Solutions in Commercial 48-layer and 96-layer 3D-NAND Flash Memories

P. Tseng, Tian-Cig Bo, Yu-Hsuan Lin, Yu-Chao Lin, Jhe-Yi Liao, F. Lee, Yu-Yu Lin, Ming-Hsiu Lee, K. Hsieh, Keh-Chung Wang, Chih-Yuan Lu
{"title":"SLC and MLC In-Memory-Approximate-Search Solutions in Commercial 48-layer and 96-layer 3D-NAND Flash Memories","authors":"P. Tseng, Tian-Cig Bo, Yu-Hsuan Lin, Yu-Chao Lin, Jhe-Yi Liao, F. Lee, Yu-Yu Lin, Ming-Hsiu Lee, K. Hsieh, Keh-Chung Wang, Chih-Yuan Lu","doi":"10.1109/IMW56887.2023.10145964","DOIUrl":null,"url":null,"abstract":"We proposed a novel in-memory-approximate-search (IMAS) method from single-level cell (SLC) to multi-level cell (MLC) based on our commercial 48-layer (48L) and 96-layer (96L) 3D-NAND flash technology. The method with word-line input as search word provides ultra-high parallel searching capability with the database stored in high-density 3D NAND-flash IMAS chip(s). The input search word can be compared with $128\\mathrm{~K}$ data words in just one read cycle, where the Hamming distance (HD) computation (for SLC approach) or similarity computation (for MLC approach) can be carried out within the memory array. Latest 96L 3D-NAND IMAS chip with CMOS under array (CuA) technology provides small chip size, long search/data word, excellent output resolution, and wide matching criteria for the tolerance on sensing current variation. Application on Memory-Augmented Neural Network (MANN) was demonstrated on VGGface2 dataset, with the comparisons between the 48L and 96L SLC 3D-NAND IMAS technologies.","PeriodicalId":153429,"journal":{"name":"2023 IEEE International Memory Workshop (IMW)","volume":"59 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2023 IEEE International Memory Workshop (IMW)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IMW56887.2023.10145964","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
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Abstract

We proposed a novel in-memory-approximate-search (IMAS) method from single-level cell (SLC) to multi-level cell (MLC) based on our commercial 48-layer (48L) and 96-layer (96L) 3D-NAND flash technology. The method with word-line input as search word provides ultra-high parallel searching capability with the database stored in high-density 3D NAND-flash IMAS chip(s). The input search word can be compared with $128\mathrm{~K}$ data words in just one read cycle, where the Hamming distance (HD) computation (for SLC approach) or similarity computation (for MLC approach) can be carried out within the memory array. Latest 96L 3D-NAND IMAS chip with CMOS under array (CuA) technology provides small chip size, long search/data word, excellent output resolution, and wide matching criteria for the tolerance on sensing current variation. Application on Memory-Augmented Neural Network (MANN) was demonstrated on VGGface2 dataset, with the comparisons between the 48L and 96L SLC 3D-NAND IMAS technologies.
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商用48层和96层3D-NAND闪存中的SLC和MLC内存近似搜索解决方案
基于我们的商用48层(48L)和96层(96L) 3D-NAND闪存技术,我们提出了一种新的内存近似搜索(IMAS)方法,从单级单元(SLC)到多级单元(MLC)。该方法以字行输入作为检索词,将数据库存储在高密度3D NAND-flash IMAS芯片中,提供了超高的并行检索能力。输入的搜索词可以在一个读取周期内与$128\ mathm {~K}$数据词进行比较,其中可以在内存数组内进行汉明距离(HD)计算(用于SLC方法)或相似性计算(用于MLC方法)。最新的96L 3D-NAND IMAS芯片采用阵列下CMOS (CuA)技术,芯片尺寸小,搜索/数据字长,输出分辨率高,感应电流变化公差匹配标准宽。在VGGface2数据集上演示了记忆增强神经网络(MANN)的应用,并对48L和96L SLC 3D-NAND IMAS技术进行了比较。
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