1.1 A smart design paradigm for smart chips

Abstract

Industry application trends are driving more 3D circuitry both at the chip and system level. These technology trends are inducing new design challenges that require the semiconductor design community to go beyond existing approaches and to come up with new methods to address the challenges of smarter chips. A new design paradigm is becoming imperative to handle end-market demand for more product functionality and the corresponding increase in the complexity of the design task. To address products' distinct technological and design requirements while keeping design cycles within appropriate time-to-market windows, chip designers must leverage solutions that can be supplied by the expertise and assets of semiconductor ecosystems. At the same time, these ecosystems must evolve beyond technology-centric solutions to provide application-specific platform solutions required to meet unique product needs. This paper provides initial direction for the innovation required to realize a smart-chip design paradigm that encompasses design solutions at the chip and system level.