{"title":"In-Situ Warpage Measurement During Thermal Cycling of Dielectric Coated SS Substrate for Large Area MCM-D Packaging","authors":"Anh X. Dang, I. C. Ume, S. Bhattacharya","doi":"10.1115/imece1999-0930","DOIUrl":null,"url":null,"abstract":"\n Feasibility of using stainless steel (SS) as a base substrate material for a large area MCM-D packaging is reported in this paper. A test vehicle was fabricated using 0.008 inch thick and 12-inch × 12-inch SS panel with laser drilled 0.01-inch vias. A dielectric material (Parylene N) was deposited on the SS panel and around the inside via walls in order to electrically isolate the via filling material from the body of the SS substrate and also making the SS surface non-conductive. Vias were filled using a commercially available conductive via-plug material. The test structure was exposed to elevated temperatures to simulate the thermal excursion the substrate would be subjected to during the MCM-D thin film process. The end objective of this work is to be able to fabricate large area (24 inch × 24 inch) SS substrates for the next generation MCM-D packaging with reduced warpage. This paper reports results of the dynamic warpage measurement during thermal cycling of a 12-inch × 12-inch SS substrate.","PeriodicalId":153178,"journal":{"name":"Electronics Manufacturing Issues","volume":"102 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-11-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Electronics Manufacturing Issues","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1115/imece1999-0930","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
Feasibility of using stainless steel (SS) as a base substrate material for a large area MCM-D packaging is reported in this paper. A test vehicle was fabricated using 0.008 inch thick and 12-inch × 12-inch SS panel with laser drilled 0.01-inch vias. A dielectric material (Parylene N) was deposited on the SS panel and around the inside via walls in order to electrically isolate the via filling material from the body of the SS substrate and also making the SS surface non-conductive. Vias were filled using a commercially available conductive via-plug material. The test structure was exposed to elevated temperatures to simulate the thermal excursion the substrate would be subjected to during the MCM-D thin film process. The end objective of this work is to be able to fabricate large area (24 inch × 24 inch) SS substrates for the next generation MCM-D packaging with reduced warpage. This paper reports results of the dynamic warpage measurement during thermal cycling of a 12-inch × 12-inch SS substrate.