M. Hirech, Olivier Florent, A. Greiner, El Housseine Rejouan
{"title":"A redefinable symbolic simulation technique for testability design rules checking","authors":"M. Hirech, Olivier Florent, A. Greiner, El Housseine Rejouan","doi":"10.1109/EDTC.1994.326796","DOIUrl":null,"url":null,"abstract":"A new symbolic simulation technique for design for testability (DFT) rules checking is discussed. With this method symbolic values and transfer functions of gates are redefinable to allow an adaptability to different sets of rules.<<ETX>>","PeriodicalId":244297,"journal":{"name":"Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-02-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDTC.1994.326796","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
Abstract
A new symbolic simulation technique for design for testability (DFT) rules checking is discussed. With this method symbolic values and transfer functions of gates are redefinable to allow an adaptability to different sets of rules.<>