Testing and diagnosis faults in FinFet circuits based on advanced test algorithm

Abstract

FinFET transistors are used in major semiconductor organizations which plays an important role in the development of the silicon industries. Due to few embedded memories and other circuit issues the transistors have specific faults in manufacturing, designing of the circuit etc. This paper presents an advanced test algorithm to diagnose those faults. The circuit with different gates is designed to identify the places having faults. In addition, two different algorithms such as non-incremental computing algorithm and Adaptive Genetic Algorithm algorithms are used to find the fault location and critical path. The transfer characteristics curve is plotted along with the delay curve which helps in finding out the simulation parameters such as noise margin, propagation delay. The results in the methodology calculates the probability density function of the critical path by estimating mean, standard deviation and variance. The advantages of the integration of the two algorithms in this paper helps in analyzing the specific faults in the circuits and the error correction of the broken link in the path analysis and has enhanced performance. Furthermore, more complicated circuits are analyzed for fault detection with different approach