0.42-to-1.20V read assist circuit for SRAMs in CMOS 65nm

Abstract

This work presents an ultra-low voltage SRAM read frequency boost circuit developed in 65nm to cover the lack of reliable sense amplifiers. This circuit enables full swing read speed-up and bitline leakage compensation from 1.2V to 0.42V. Embedded in a 65nm 32kb 10T SRAM, it offers 10% frequency gain and 10-to-90% leakage energy reduction from nominal to ultra-low voltage supply.