Analytical redundancy based approach for concurrent fault detection in linear digital systems

Abstract

With the advent of VLSI technology, large numbers of processing elements which cooperate with each other to achieve a complex function have become feasible. A major concern in the design of these complex devices has been the ability to verify and in some instances guarantee their fault free operation. Since any error in processed data may have catastrophic effects, therefore some levels of fault detection must be incorporated in order to increase the reliability of systems. This paper presents a general method for concurrent error detection in linear digital systems using analytical redundancy, i.e., relations between the measured variables. The fault detection mission can be performed using only the available connectable (measurable) variables, e.g. the external inputs and outputs, while the hardware overhead of the test circuit can be optimized through connecting on some internal mensurable state variables. Generally, this method is applicable to all linear digital systems while the test circuit obtained for on-line detector implementation is still very reasonable.