Concurrent Test Generation

V. Agrawal, Alok S. Doshi
{"title":"Concurrent Test Generation","authors":"V. Agrawal, Alok S. Doshi","doi":"10.1109/ATS.2005.39","DOIUrl":null,"url":null,"abstract":"We define a new type of test, called \"concurrent test,\" for a combinational circuit. Given a set of target faults, a concurrent-test is an input vector that detects all (or most) faults in the set. When concurrent tests are generated for fault sets obtained from independence fault collapsing, minimal or near-minimal tests can be expected. This paper gives new simulation-based methods for independence fault collapsing and for deriving concurrent tests using single-fault ATPG.","PeriodicalId":373563,"journal":{"name":"14th Asian Test Symposium (ATS'05)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-12-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"14th Asian Test Symposium (ATS'05)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.2005.39","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9

Abstract

We define a new type of test, called "concurrent test," for a combinational circuit. Given a set of target faults, a concurrent-test is an input vector that detects all (or most) faults in the set. When concurrent tests are generated for fault sets obtained from independence fault collapsing, minimal or near-minimal tests can be expected. This paper gives new simulation-based methods for independence fault collapsing and for deriving concurrent tests using single-fault ATPG.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
并发测试生成
我们为组合电路定义了一种新的测试类型,称为“并发测试”。给定一组目标故障,并发测试是检测集合中所有(或大多数)故障的输入向量。当为从独立故障折叠中获得的故障集生成并发测试时,可以预期最少或接近最少的测试。本文提出了基于仿真的独立故障崩溃和单故障ATPG并发测试的新方法。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Efficient Static Compaction Techniques for Sequential Circuits Based on Reverse Order Restoration and Test Relaxation Practical Aspects of Delay Testing for Nanometer Chips State-reuse Test Generation for Progressive Random Access Scan: Solution to Test Power, Application Time and Data Size A Framework for Automatic Assembly Program Generator (A^2PG) for Verification and Testing of Processor Cores Arithmetic Test Strategy for FFT Processor
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1