Design and Simulation of a New Reconfigurable Analog to Digital Converter based on Multisim

Jayamala Adsul, J. Nair, P. Vaidya
{"title":"Design and Simulation of a New Reconfigurable Analog to Digital Converter based on Multisim","authors":"Jayamala Adsul, J. Nair, P. Vaidya","doi":"10.1109/ICNTE44896.2019.8946032","DOIUrl":null,"url":null,"abstract":"This paper presents the design of a reconfigurable Analog-to-Digital Converter (ADC). The design employs a sub-ranging technique and implements a reconfigurable ADC which can be configured to give 8-bit, 12-bit and 16-bit resolution. This ADC can be used for a variety of applications since its resolution and conversion time can be varied depending upon the application. The design has been simulated using NI Multisim 14.1 and results have been presented in this paper. It achieves 8-bit resolution with the sampling rate of 100MHz, 12-bit resolution with the sampling rate of 250KHz and16-bit resolution with the sampling rate of 50KHz.","PeriodicalId":292408,"journal":{"name":"2019 International Conference on Nascent Technologies in Engineering (ICNTE)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2019-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2019 International Conference on Nascent Technologies in Engineering (ICNTE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICNTE44896.2019.8946032","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

This paper presents the design of a reconfigurable Analog-to-Digital Converter (ADC). The design employs a sub-ranging technique and implements a reconfigurable ADC which can be configured to give 8-bit, 12-bit and 16-bit resolution. This ADC can be used for a variety of applications since its resolution and conversion time can be varied depending upon the application. The design has been simulated using NI Multisim 14.1 and results have been presented in this paper. It achieves 8-bit resolution with the sampling rate of 100MHz, 12-bit resolution with the sampling rate of 250KHz and16-bit resolution with the sampling rate of 50KHz.
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基于Multisim的新型可重构模数转换器的设计与仿真
本文介绍了一种可重构模数转换器(ADC)的设计。该设计采用子测距技术,实现可重构ADC,可配置为8位、12位和16位分辨率。该ADC可用于各种应用,因为它的分辨率和转换时间可以根据应用而变化。利用NI Multisim 14.1软件对该设计进行了仿真,并给出了仿真结果。采样率为100MHz的8位分辨率,采样率为250KHz的12位分辨率,采样率为50KHz的16位分辨率。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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