Is RISC-V ready for Space? A Security Perspective

Luca Cassano, Stefano Di Mascio, A. Palumbo, A. Menicucci, G. Furano, Giuseppe Bianchi, M. Ottavi
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引用次数: 4

Abstract

Integrated circuits employed in space applications generally have very low-volume production and high performance requirements. Therefore, the adoption of Commercial-Off-The-Shelf (COTS) components and Third Party Intellectual Property cores (3PIPs) is of extreme interest to make system design, implementation and deployment cost-effective and viable w.r.t. performance. On the other hand, this design paradigm exposes the system to a number of security threats both at design-time and at runtime. In this paper, we discuss the security issues related to space applications mainly focusing on threats that come from the adoption of the well-known RISCV microprocessor. We highlight how Hardware Trojan horses (HTHs) and Microarchitectural Side-Channel Attacks (MSCAs) may compromise the overall system operation by either altering its nominal behavior or by stealing secret information. We discuss the security extensions provided by the RISC-V architecture as well as their limitations. The paper is concluded by an overview of the issues that are still open regarding the security of such microprocessor in the space domain.
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RISC-V为太空做好准备了吗?安全视角
空间应用中使用的集成电路通常具有非常小的产量和高性能要求。因此,采用商用现货(COTS)组件和第三方知识产权核心(3pip)对于使系统设计、实现和部署具有成本效益和可行的w.r.t.性能非常重要。另一方面,此设计范例在设计时和运行时都将系统暴露于许多安全威胁之下。在本文中,我们讨论了与空间应用相关的安全问题,主要关注采用众所周知的RISCV微处理器所带来的威胁。我们强调硬件特洛伊木马(HTHs)和微架构侧通道攻击(msca)如何通过改变其名义行为或窃取机密信息来危害整个系统操作。我们讨论了RISC-V架构提供的安全扩展及其限制。最后,对空间领域微处理器的安全问题进行了综述。
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