Reducing Power Consumption of GPGPUs Through Instruction Reordering

Abstract

Execution units in GPGPU consume much static power. However, reducing the static power of execution units is not clear based on two reasons. First, the very long idle time of execution units in GPGPU is fragmented in to many short periods. Second, these units are very critical to total performance. In this paper, we propose a method to reduce the static power without any performance overhead. We utilize out-of-order execution of instructions to make the idle period of execution units much longer. Experimental results show that our proposal improves over the state-of-the-art in terms of power and performance by 25% and 8%, on average, respectively.