{"title":"System-level analog simulation of a mixed-signal continuous-time field programmable analog array","authors":"J. Becker, F. Henrici, Y. Manoli","doi":"10.1109/IWSOC.2005.102","DOIUrl":null,"url":null,"abstract":"Field programmable analog arrays (FPAAs) represent analog signal transfer functions, which depend on alterable digital configuration data. They are indispensable if reconfigurable analog signal processing has to be included in a system-on-chip. For system-level design of filter structures as well as accurate transistor-level simulations of the analog transfer function, it is necessary to enter the respective configuration data before phase/magnitude analyses are run. This paper introduces a graphical design-entry tool for an FPAA consisting of 17 g/sub m/-C blocks for instantiation of high-frequency filters. It also reports on first simulation results confirming the feasibility up to corner frequencies of hundreds of MHz. Transfer function simulations of basic building-blocks are compared with theory and lead to an exemplary instantiation of a fourth-order Butterworth-filter.","PeriodicalId":328550,"journal":{"name":"Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2005-07-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Fifth International Workshop on System-on-Chip for Real-Time Applications (IWSOC'05)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWSOC.2005.102","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 7
Abstract
Field programmable analog arrays (FPAAs) represent analog signal transfer functions, which depend on alterable digital configuration data. They are indispensable if reconfigurable analog signal processing has to be included in a system-on-chip. For system-level design of filter structures as well as accurate transistor-level simulations of the analog transfer function, it is necessary to enter the respective configuration data before phase/magnitude analyses are run. This paper introduces a graphical design-entry tool for an FPAA consisting of 17 g/sub m/-C blocks for instantiation of high-frequency filters. It also reports on first simulation results confirming the feasibility up to corner frequencies of hundreds of MHz. Transfer function simulations of basic building-blocks are compared with theory and lead to an exemplary instantiation of a fourth-order Butterworth-filter.