{"title":"A 25–30 GHz 6-bit digital attenuator with high accuracy and low insertion loss","authors":"Jing Zhao, Bo Zhang, Xiaofeng Yang","doi":"10.1109/IEEE-IWS.2016.7585420","DOIUrl":null,"url":null,"abstract":"A 25-30 GHz 6-bit digital attenuator with high accuracy and low insertion loss by 0.15μm GaAs PHEMT process is presented in this work. An improved structure with a parallel capacitor is applied in the attenuator architecture to enhance the attenuation accuracy. To reduce leakage of the RF signal, a cascade structure is proposed to enhance isolation and compensate the insertion loss simultaneously. The On-wafer measurement results show that the 6-bit GaAs digital attenuator has 0.5 dB resolution and 31.5 dB dynamic attenuation rage while the return loss is better than -10 dB for all states; the attenuation accuracy is better than 0.5 dB while the RMS attenuation error is less than 0.21 dB; The insertion loss is less than 5.7 dB while the insertion phase shift is less than -6.0° The total chip size is 2.0mm × 1.0mm.","PeriodicalId":185971,"journal":{"name":"2016 IEEE MTT-S International Wireless Symposium (IWS)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-03-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE MTT-S International Wireless Symposium (IWS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IEEE-IWS.2016.7585420","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 5
Abstract
A 25-30 GHz 6-bit digital attenuator with high accuracy and low insertion loss by 0.15μm GaAs PHEMT process is presented in this work. An improved structure with a parallel capacitor is applied in the attenuator architecture to enhance the attenuation accuracy. To reduce leakage of the RF signal, a cascade structure is proposed to enhance isolation and compensate the insertion loss simultaneously. The On-wafer measurement results show that the 6-bit GaAs digital attenuator has 0.5 dB resolution and 31.5 dB dynamic attenuation rage while the return loss is better than -10 dB for all states; the attenuation accuracy is better than 0.5 dB while the RMS attenuation error is less than 0.21 dB; The insertion loss is less than 5.7 dB while the insertion phase shift is less than -6.0° The total chip size is 2.0mm × 1.0mm.