Compiler parallelization of C programs for multi-core DSPs with multiple address spaces

First IEEE/ACM/IFIP International Conference on Hardware/ Software Codesign and Systems Synthesis (IEEE Cat. No.03TH8721) Pub Date : 2003-10-01 DOI:10.1145/944645.944702

Björn Franke, M. O’Boyle

引用次数: 13

Abstract

This paper develops a new approach to compiling C programs for multiple address space, multi-processor DSPs. It integrates a novel data transformation technique that exposes the processor location of partitioned data into a parallelization strategy. When this is combined with a new address resolution mechanism, it generates efficient programs that run on multiple address spaces without using message passing. This approach is applied to the UTDSP benchmark suite and evaluated on a four processor TigerSHARC board, where it is shown to outperform existing approaches and give an average speedup of 3.25 on the parallel benchmarks.

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具有多个地址空间的多核dsp的C程序的编译器并行化

本文提出了一种针对多地址空间、多处理器dsp编写C语言程序的新方法。它集成了一种新的数据转换技术，该技术将分区数据的处理器位置公开到并行化策略中。当它与一个新的地址解析机制结合使用时，它可以生成在多个地址空间上运行的高效程序，而无需使用消息传递。该方法应用于UTDSP基准测试套件，并在四处理器TigerSHARC板上进行了评估，结果显示其优于现有方法，并在并行基准测试上平均加速3.25。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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First IEEE/ACM/IFIP International Conference on Hardware/ Software Codesign and Systems Synthesis (IEEE Cat. No.03TH8721)

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