INEC: Fast and Coherent In-Network Erasure Coding

Haiyang Shi, Xiaoyi Lu
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引用次数: 11

Abstract

Erasure coding (EC) is a promising fault tolerance scheme that has been applied to many well-known distributed storage systems. The capability of Coherent EC Calculation and Networking on modern SmartNICs has demonstrated that EC will be an essential feature of in-network computing. In this paper, we propose a set of coherent in-network EC primitives, named INEC. Our analyses based on the proposed α-β performance model demonstrate that INEC primitives can enable different kinds of EC schemes to fully leverage the EC offload capability on modern SmartNICs. We implement INEC on commodity RDMA NICs and integrate it into five state-of-the-art EC schemes. Our experiments show that INEC primitives significantly reduce 50th, 95th, and 99th percentile latencies, and accelerate the end-to-end throughput, write, and degraded read performance of the key-value store co-designed with INEC by up to 99.57%, 47.30%, and 49.55%, respectively.
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快速和一致的网络内擦除编码
Erasure coding (EC)是一种很有前途的容错方案,已应用于许多知名的分布式存储系统中。现代智能网卡上相干电子计算和联网的能力表明,电子计算将成为网络计算的基本特征。在本文中,我们提出了一组一致的网络内EC原语,称为INEC。我们基于提出的α-β性能模型的分析表明,INEC原语可以使不同类型的EC方案充分利用现代smartnic上的EC卸载能力。我们在商用RDMA网卡上实施INEC,并将其集成到五个最先进的EC方案中。我们的实验表明,INEC原语显著降低了第50、95和99百分位延迟,并将与INEC共同设计的键值存储的端到端吞吐量、写入和读取性能分别提高了99.57%、47.30%和49.55%。
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