R. Preston, R. Badeau, D. Bailey, Shane L. Bell, L. Biro, W. Bowhill, D. Dever, S. Felix, R. Gammack, V. Germini, M. Gowan, P. Gronowski, D. B. Jackson, S. Mehta, S. Morton, J. Pickholtz, M. Reilly, M. Smith
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引用次数: 97
Abstract
A 250M transistor microprocessor implements the Alpha instruction set and features 8-wide superscalar issue and simultaneous multithreading in a 0.125/spl mu/m SOI process. Performance is estimated at over three times that of the previous design.
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