Process Optimization in IMD Deposition: A Sucessful Application of Isothermal Fast Wafer-Level Electromigration

G. Yao, Z. Han, H. Yap, F. P. Yuen, C. Tan, P. Tan, P. Paliwoda, C. Eng
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Abstract

In this work, we explore the effect of different IMD deposition tools on the occurrence of early electromigration (EM) failure. The failure is revealed by the fast Wafer Level Reliability (fWLR) method. It is found that under the same embedded IMD scheme (i.e. HDP FSG and then TEOS USG), the initial HDP FSG film deposition condition is the main cause for fWLR-EM early failure. It deteriorates subsequent USG film stress and imposes the stress on metal layers. This is also confirmed by Package Level Reliability EM (PLR-EM). Moreover, by understanding reliability risk caused by initial FSG film quality, we performed recipe improvement experiments and obtained better EM performance. The fWLR method proves its fast and accurate characterization capabilities in process development and monitoring.
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IMD沉积工艺优化:晶圆级等温快速电迁移的成功应用
在这项工作中,我们探讨了不同的IMD沉积工具对早期电迁移(EM)故障发生的影响。采用快速晶圆级可靠性(fWLR)方法揭示了故障。研究发现,在相同的嵌入式IMD方案下(即HDP FSG,然后是TEOS USG), HDP FSG膜的初始沉积条件是导致fWLR-EM早期失效的主要原因。它使随后的USG薄膜应力恶化,并对金属层施加应力。封装级可靠性EM (PLR-EM)也证实了这一点。此外,通过了解FSG薄膜初始质量带来的可靠性风险,我们进行了配方改进实验,获得了更好的电磁性能。该方法在工艺开发和监控中具有快速、准确的表征能力。
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