A 4-bit Binary weighted Current Steering Digital To Analog Converter based on CNTFET

Suvarna Mujumdar, Nelofer Afzal, S. Loan
{"title":"A 4-bit Binary weighted Current Steering Digital To Analog Converter based on CNTFET","authors":"Suvarna Mujumdar, Nelofer Afzal, S. Loan","doi":"10.1109/ICM52667.2021.9664934","DOIUrl":null,"url":null,"abstract":"In this work, we design and simulate a high performance Carbon Nanotube Field Effect Transistor (CNTFET) based current steering (CS) digital to analog-(DAC) circuit. The proposed DAC employs current steering technique with Simple Current Mirror, is a 4-bit with a sampling rate of 0.1G sample/sec, employing 32 nm technology node CNTFETs. A CS-DAC employing the conventional 32 technology node MOS has also been designed and compared with the proposed CNTFET based CS-DAC. The comparative analysis of various performance measuring parameters like integer non-linearity (INL), differential nonlinearity (DNL) glitch energy, power consumption etc. has been comprehensively performed. It has been observed that the unique properties of CNTs have made the proposed DAC to significantly outperform the conventional MOS technology based DAC. The static and dynamic performance of CS-DAC has been studied thoroughly at 0.9V power supply. It has been observed that in the proposed CNTFET based CS-DAC, INL and DNL have got decreased by 87.5% and 91.80% respectively in comparison to the conventional MOS based CS-DAC. Further, the dynamic performance measuring parameter like Spurious Free Dynamic Range (SFDR) has increased by 41.39 % and the power consumption has got decreased by ~53% in the proposed DAC in comparison to the conventional DAC. The glitch power in CNTFET based DAC has got reduced by 2.5 times in comparison to that in conventional DAC.","PeriodicalId":212613,"journal":{"name":"2021 International Conference on Microelectronics (ICM)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-12-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 International Conference on Microelectronics (ICM)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICM52667.2021.9664934","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4

Abstract

In this work, we design and simulate a high performance Carbon Nanotube Field Effect Transistor (CNTFET) based current steering (CS) digital to analog-(DAC) circuit. The proposed DAC employs current steering technique with Simple Current Mirror, is a 4-bit with a sampling rate of 0.1G sample/sec, employing 32 nm technology node CNTFETs. A CS-DAC employing the conventional 32 technology node MOS has also been designed and compared with the proposed CNTFET based CS-DAC. The comparative analysis of various performance measuring parameters like integer non-linearity (INL), differential nonlinearity (DNL) glitch energy, power consumption etc. has been comprehensively performed. It has been observed that the unique properties of CNTs have made the proposed DAC to significantly outperform the conventional MOS technology based DAC. The static and dynamic performance of CS-DAC has been studied thoroughly at 0.9V power supply. It has been observed that in the proposed CNTFET based CS-DAC, INL and DNL have got decreased by 87.5% and 91.80% respectively in comparison to the conventional MOS based CS-DAC. Further, the dynamic performance measuring parameter like Spurious Free Dynamic Range (SFDR) has increased by 41.39 % and the power consumption has got decreased by ~53% in the proposed DAC in comparison to the conventional DAC. The glitch power in CNTFET based DAC has got reduced by 2.5 times in comparison to that in conventional DAC.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
基于CNTFET的4位二进制加权电流转向数模转换器
在这项工作中,我们设计并模拟了一个高性能的基于碳纳米管场效应晶体管(CNTFET)的电流转向(CS)数模转换(DAC)电路。所提出的DAC采用电流转向技术和简单电流镜,是一个4位采样率为0.1G采样/秒,采用32纳米技术节点cntfet。设计了一种采用传统32技术节点MOS的CS-DAC,并与基于CNTFET的CS-DAC进行了比较。对整数非线性(INL)、微分非线性(DNL)、故障能量、功耗等各种性能测量参数进行了全面的对比分析。已经观察到,碳纳米管的独特性质使得所提出的DAC显著优于传统的基于MOS技术的DAC。对CS-DAC在0.9V电源下的静态和动态性能进行了深入的研究。实验结果表明,与传统MOS结构的CS-DAC相比,基于CNTFET的CS-DAC的INL和DNL分别降低了87.5%和91.80%。此外,与传统的DAC相比,该DAC的动态性能测量参数如无杂散动态范围(SFDR)提高了41.39%,功耗降低了53%。与传统DAC相比,基于CNTFET的DAC的故障功率降低了2.5倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Hardware Implementation of Yolov4-tiny for Object Detection Comparative Study of Different Activation Functions for Anomalous Sound Detection Speed Up Functional Coverage Closure of CORDIC Designs Using Machine Learning Models Lightweight Image Encryption: Cellular Automata and the Lorenz System Double Gate TFET with Germanium Pocket and Metal drain using Dual Oxide
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1