An FPGA design of a unified hash engine for IPSec authentication

Abstract

Hash functions are important security primitives used for authentication and data integrity. Among the most popular hash functions are MD5, SHA-1, and RIPEMD-160 that are used in conjunction with HMAC for IPSec. These three hash functions are based on an older one, MD4. Therefore, they have some similarities that can be exploited for designing a unified engine to perform the three hash functions. A unified engine design proves useful since the three algorithms are to be used by same implementation on the same core for authentication and data integrity using HMAC for IPSec. In this work, we design a SoC with a unified hash engine that can be reconfigured at runtime to perform one of the three hash functions. The results of our work show that the proposed engine has a balance between area and throughput compared to previous works.