T. Someya, K. Matsunaga, H. Morimura, T. Sakurai, M. Takamiya
{"title":"56-Level programmable voltage detector in steps of 50mV for battery management","authors":"T. Someya, K. Matsunaga, H. Morimura, T. Sakurai, M. Takamiya","doi":"10.1109/ASSCC.2016.7844132","DOIUrl":null,"url":null,"abstract":"A programmable voltage detector (PVD) for the battery management is developed for the first time. In battery management applications, PVD's with fine voltage resolution (<±1% of battery voltage) are required to precisely control the charging and discharging of the battery and to provide a universal voltage detector. The proposed fine voltage-step subtraction (FVS) method in PVD enables the wide detection voltage (Vdetect) range from 1.88 V to 4.67 V, fine Vdetect resolution of 50mV, and the 56-level linear programmability. Compared with previous publications, the 50-mV resolution is the smallest and the 56-level programmability is the largest. The programmability of Vdetect enables a Vdetect hopping capability achieving time-varying Vdetect to reduce the number of voltage detectors in the battery management system. PVD fabricated in 5V, 250-nm CMOS process shows the measured power consumption of 13nW at 3.5V and the temperature coefficient of 0.17mV/°C in −20°C to 80°C.","PeriodicalId":278002,"journal":{"name":"2016 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE Asian Solid-State Circuits Conference (A-SSCC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASSCC.2016.7844132","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 6
Abstract
A programmable voltage detector (PVD) for the battery management is developed for the first time. In battery management applications, PVD's with fine voltage resolution (<±1% of battery voltage) are required to precisely control the charging and discharging of the battery and to provide a universal voltage detector. The proposed fine voltage-step subtraction (FVS) method in PVD enables the wide detection voltage (Vdetect) range from 1.88 V to 4.67 V, fine Vdetect resolution of 50mV, and the 56-level linear programmability. Compared with previous publications, the 50-mV resolution is the smallest and the 56-level programmability is the largest. The programmability of Vdetect enables a Vdetect hopping capability achieving time-varying Vdetect to reduce the number of voltage detectors in the battery management system. PVD fabricated in 5V, 250-nm CMOS process shows the measured power consumption of 13nW at 3.5V and the temperature coefficient of 0.17mV/°C in −20°C to 80°C.