{"title":"An efficient architecture for an improved watershed algorithm and its FPGA implementation","authors":"C. Rambabu, L. Chakrabarti, Anil Mahanta","doi":"10.1109/FPT.2002.1188713","DOIUrl":null,"url":null,"abstract":"This paper proposes a fast watershed algorithm derived from Meyer's simulated flooding based algorithm. The parallel processing adopted in conditional neighborhood comparisons for processing 3/spl times/3 pixels in one process leads to reduced computational complexity compared to Meyer's algorithm. The proposed algorithm has been implemented in an Xilinx FPGA environment.","PeriodicalId":355740,"journal":{"name":"2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings.","volume":"183 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2002-12-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/FPT.2002.1188713","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3
Abstract
This paper proposes a fast watershed algorithm derived from Meyer's simulated flooding based algorithm. The parallel processing adopted in conditional neighborhood comparisons for processing 3/spl times/3 pixels in one process leads to reduced computational complexity compared to Meyer's algorithm. The proposed algorithm has been implemented in an Xilinx FPGA environment.
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