ECC design of a custom DRAM storage unit

J. Peter
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引用次数: 15

Abstract

The architecture and ECC (error correction code) implementation of a custom storage unit built with 4 Mb DRAMs packaged on 4 MB SIMM (single in line module) and controlled with a CMOS 1 micron ASIC chips set will be described. The upgrade with 16 Mb DRAMs chips packaged on 16 MB SIMM is also supported. The storage unit is designed to interface with an INTEL i486 microprocessor running at 25 MHz and to provide an optimum correction capability of the ECC based on expected DRAMs chip failures mechanisms. This storage unit is used in the 3746 model 900 Communication Controller announced by IBM. The maximum DRAM space supported is 50 SIMMs.<>
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设计一种定制的ECC DRAM存储单元
本文将描述一个定制存储单元的架构和ECC(纠错码)实现,该存储单元由封装在4mb SIMM(单线模块)上的4mb dram组成,并由CMOS 1微米ASIC芯片组控制。支持在16mb SIMM上封装16mb dram芯片的升级。该存储单元设计用于与运行在25 MHz的INTEL i486微处理器接口,并根据预期的dram芯片故障机制提供ECC的最佳校正能力。该存储单元用于IBM公司发布的3746型900通信控制器。支持的最大内存容量为50simm
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