Design of an 45nm NCFET Based Compute-in-SRAM for Energy-Efficient Machine Learning Applications

Abstract

In memory computation for machine learning (ML) applications is a novel technique for neural-network computation accelerators, since it is highly parallel and can save a great amount of computation and memory access power. In this paper, we propose a compute in memory (CIM) design based on a new type of high-performance transistor, called Negative Capacitance Field Effect Transistor (NCFET). The proposed design demonstrates much higher energy efficiency than the CIM designs based on traditional CMOS transistors. Simulation results show that the proposed NCFET CIM achieves 3X energy reduction or 18X speed enhancement than the CMOS based CIM design.