On the analog computational characteristics of memristive networks

I. Vourkas, G. Sirakoulis
{"title":"On the analog computational characteristics of memristive networks","authors":"I. Vourkas, G. Sirakoulis","doi":"10.1109/ICECS.2013.6815416","DOIUrl":null,"url":null,"abstract":"Within a growing variety of systems that exhibit memristive behavior nowadays, most of the research has so far focused on the properties of these single devices, whereas very little is known about their response when they are organized into networks. In this work we study the composite characteristics of memristive elements connected in regular one-dimensional configurations. Using a nonlinear memristor model we carry out simulations and analyze the characteristics of complex memristor circuits, as well as investigate the relationships among the single devices. We show how composite memristive systems can be efficiently built out of individual memristive devices, presenting different electrical characteristics from their structural elements. Finally, we exploit the threshold-dependent nonlinear memristive behavior and elaborate the presented memristive networks to build analog computational circuits like a fully passive memristive analog decimal counter. The presented analysis provides intuition into the response of complex memristive networks and motivates for further elaboration of their composite and dynamic complexity for the creation of sophisticated memristive systems.","PeriodicalId":117453,"journal":{"name":"2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICECS.2013.6815416","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 12

Abstract

Within a growing variety of systems that exhibit memristive behavior nowadays, most of the research has so far focused on the properties of these single devices, whereas very little is known about their response when they are organized into networks. In this work we study the composite characteristics of memristive elements connected in regular one-dimensional configurations. Using a nonlinear memristor model we carry out simulations and analyze the characteristics of complex memristor circuits, as well as investigate the relationships among the single devices. We show how composite memristive systems can be efficiently built out of individual memristive devices, presenting different electrical characteristics from their structural elements. Finally, we exploit the threshold-dependent nonlinear memristive behavior and elaborate the presented memristive networks to build analog computational circuits like a fully passive memristive analog decimal counter. The presented analysis provides intuition into the response of complex memristive networks and motivates for further elaboration of their composite and dynamic complexity for the creation of sophisticated memristive systems.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
忆忆网络模拟计算特性研究
在当今越来越多的系统中,表现出记忆行为,迄今为止,大多数研究都集中在这些单个设备的特性上,而当它们被组织成网络时,对它们的反应知之甚少。在这项工作中,我们研究了在规则的一维构型中连接的记忆元的复合特性。利用非线性忆阻器模型对复杂忆阻电路进行了仿真和分析,并研究了单个器件之间的关系。我们展示了复合忆阻系统如何有效地建立在单个忆阻器件之上,呈现出与其结构元件不同的电气特性。最后,我们利用阈值相关的非线性忆阻行为,并详细阐述了所提出的忆阻网络来构建模拟计算电路,如全无源忆阻模拟十进制计数器。所提出的分析提供了对复杂记忆网络响应的直觉,并激励进一步阐述其复合和动态复杂性,以创建复杂的记忆系统。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Early detection of lung cancer based on sputum color image analysis Connecting spiking neurons to a spiking memristor network changes the memristor dynamics FPGA implementation of a parameterized Fourier synthesizer Multi-level MPSoC modeling for reducing software development cycle Low-noise CMOS analog-to-digital interface for MEMS resistive microphone
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1