Second-order ΔΣAD modulator with novel feedforward architecture

H. San, Hajime Konagaya, Feng Xu, A. Motozawa, Haruo Kobayashi, Kazumasa Ando, H. Yoshida, Chieto Murayama
{"title":"Second-order ΔΣAD modulator with novel feedforward architecture","authors":"H. San, Hajime Konagaya, Feng Xu, A. Motozawa, Haruo Kobayashi, Kazumasa Ando, H. Yoshida, Chieto Murayama","doi":"10.1109/MWSCAS.2007.4488558","DOIUrl":null,"url":null,"abstract":"This paper proposes novel feedforward architecture of a second-order DeltaSigmaAD modulator with single DAC- feedback topology. DeltaSigmaAD modulator realizes high resolution by oversampling and noise shaping technique. However, its SNDR (signal to noise and distortion ratio) is limited by the dynamic range of the input signal and non-idealities of building blocks, particularly by the harmonic distortion in amplifier circuits. Compared with a feed backed DeltaSigmaAD modulator, in a full feedforward DeltaSigmaAD modulator structure, the signal transfer function is unity under ideal circumstances. It means that the signal swings through the loop filter become smaller. Therefore, the harmonic distortion generated inside the loop filter can be significantly reduced because the effect of non-idealities in amplifiers can be suppressed when signal swing is small. Moreover, the reduction of the internal signal swings also relaxes output swing requirement for amplifiers in low-voltage design. However, in conventional feedforward DeltaSigmaAD modulator, an analog adder is needed before quantizer. Especially in a multibit modulator, an additional amplifier is necessary to realize the summation of feedforward signals, which leads to large chip area and extra power dissipation. In this paper, we propose a novel architecture of a feedforward DeltaSigmaAD modulator. It realizes the summation of feedforward signals without additional amplifier that is equivalent to the conventional one but smaller chip area and low-power dissipation. We also conducted MATLAB and SPICE simulations to verify the proposed architecture and modulator circuits.","PeriodicalId":256061,"journal":{"name":"2007 50th Midwest Symposium on Circuits and Systems","volume":"102 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 50th Midwest Symposium on Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2007.4488558","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9

Abstract

This paper proposes novel feedforward architecture of a second-order DeltaSigmaAD modulator with single DAC- feedback topology. DeltaSigmaAD modulator realizes high resolution by oversampling and noise shaping technique. However, its SNDR (signal to noise and distortion ratio) is limited by the dynamic range of the input signal and non-idealities of building blocks, particularly by the harmonic distortion in amplifier circuits. Compared with a feed backed DeltaSigmaAD modulator, in a full feedforward DeltaSigmaAD modulator structure, the signal transfer function is unity under ideal circumstances. It means that the signal swings through the loop filter become smaller. Therefore, the harmonic distortion generated inside the loop filter can be significantly reduced because the effect of non-idealities in amplifiers can be suppressed when signal swing is small. Moreover, the reduction of the internal signal swings also relaxes output swing requirement for amplifiers in low-voltage design. However, in conventional feedforward DeltaSigmaAD modulator, an analog adder is needed before quantizer. Especially in a multibit modulator, an additional amplifier is necessary to realize the summation of feedforward signals, which leads to large chip area and extra power dissipation. In this paper, we propose a novel architecture of a feedforward DeltaSigmaAD modulator. It realizes the summation of feedforward signals without additional amplifier that is equivalent to the conventional one but smaller chip area and low-power dissipation. We also conducted MATLAB and SPICE simulations to verify the proposed architecture and modulator circuits.
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具有新颖前馈结构的二阶ΔΣAD调制器
提出了一种具有单DAC-反馈拓扑结构的二阶DeltaSigmaAD调制器的前馈结构。DeltaSigmaAD调制器通过过采样和噪声整形技术实现高分辨率。然而,它的SNDR(信噪比和失真比)受到输入信号的动态范围和构建模块的非理想性,特别是放大器电路中的谐波失真的限制。与馈后式DeltaSigmaAD调制器相比,在全前馈DeltaSigmaAD调制器结构中,理想情况下信号传递函数是统一的。这意味着通过环路滤波器的信号波动变得更小。因此,在信号摆幅较小的情况下,可以抑制放大器非理想性的影响,从而显著降低环路滤波器内部产生的谐波失真。此外,内部信号摆幅的减小也降低了低压设计中对放大器输出摆幅的要求。然而,在传统的前馈DeltaSigmaAD调制器中,在量化器之前需要一个模拟加法器。特别是在多比特调制器中,需要额外的放大器来实现前馈信号的求和,导致芯片面积大,功耗增加。在本文中,我们提出了一种新颖的前馈DeltaSigmaAD调制器结构。它在不增加放大器的情况下实现了与传统放大器等效的前馈信号求和,但芯片面积更小,功耗更低。我们还进行了MATLAB和SPICE仿真来验证所提出的架构和调制器电路。
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