{"title":"CloudV: A cloud-based educational digital design environment","authors":"M. Shalan, S. Reda","doi":"10.1109/MSE.2017.7945081","DOIUrl":null,"url":null,"abstract":"This paper describes a cloud-based digital design environment for ASIC and FPGA. We call it CloudV. CloudV is built using open-source as well as homegrown EDA software tools. The ultimate goal of CloudV is to reduce the design costs by relying on cloud infrastructure and on collaborative design. Currently, CloudV v 1.0 allows students to gain hands-on experience in digital ASIC design tasks covering HDL design entry, HDL simulation, RTL synthesis and technology mapping. Physical implementation support for ASIC and FPGA is in the work to have a complete digital design flow. CloudV enhances the quality of teaching, as students focus on design activities instead of spending their time learning how to use new software tools. Moreover, students can, virtually, use CloudV anywhere using any connected computing device. The open-source nature of CloudV provides educators with a single shared platform for their tutorial and design assignments.","PeriodicalId":339888,"journal":{"name":"2017 IEEE International Conference on Microelectronic Systems Education (MSE)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE International Conference on Microelectronic Systems Education (MSE)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MSE.2017.7945081","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
This paper describes a cloud-based digital design environment for ASIC and FPGA. We call it CloudV. CloudV is built using open-source as well as homegrown EDA software tools. The ultimate goal of CloudV is to reduce the design costs by relying on cloud infrastructure and on collaborative design. Currently, CloudV v 1.0 allows students to gain hands-on experience in digital ASIC design tasks covering HDL design entry, HDL simulation, RTL synthesis and technology mapping. Physical implementation support for ASIC and FPGA is in the work to have a complete digital design flow. CloudV enhances the quality of teaching, as students focus on design activities instead of spending their time learning how to use new software tools. Moreover, students can, virtually, use CloudV anywhere using any connected computing device. The open-source nature of CloudV provides educators with a single shared platform for their tutorial and design assignments.