Pub Date : 2017-05-11DOI: 10.1109/MSE.2017.7945075
O. Bonnaud, L. Fesquet
The very fast evolution of the application field in microelectronics requires the adaption of higher education to engineer and master students in order to answer to the industrial, “Research and Development”, and economical needs. In parallel, the development of our digital society, which proposes more and more massive open on-line courses, maintains the students in a theoretical knowledge. Therefore higher education must increase practices and know-how. This has been done in the framework of the French national network for education in microelectronics and nanotechnologies (GIP-CNFM), which adopted a strategy to promote innovative practices in the microelectronics. Through the microelectronics evolution, several examples are given to justify that practice and know-how are the pillar of technical higher education.
{"title":"Innovative practice in the French microelectronics education targeting the industrial needs","authors":"O. Bonnaud, L. Fesquet","doi":"10.1109/MSE.2017.7945075","DOIUrl":"https://doi.org/10.1109/MSE.2017.7945075","url":null,"abstract":"The very fast evolution of the application field in microelectronics requires the adaption of higher education to engineer and master students in order to answer to the industrial, “Research and Development”, and economical needs. In parallel, the development of our digital society, which proposes more and more massive open on-line courses, maintains the students in a theoretical knowledge. Therefore higher education must increase practices and know-how. This has been done in the framework of the French national network for education in microelectronics and nanotechnologies (GIP-CNFM), which adopted a strategy to promote innovative practices in the microelectronics. Through the microelectronics evolution, several examples are given to justify that practice and know-how are the pillar of technical higher education.","PeriodicalId":339888,"journal":{"name":"2017 IEEE International Conference on Microelectronic Systems Education (MSE)","volume":"227 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132094142","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-11DOI: 10.1109/MSE.2017.7945084
W. Richard
A new approach to introducing computer architecture in introductory logic design courses based on Babbage's difference engine is described. The difference engine is the thread that students follow from logic design to the concepts associated with a basic load/store microprocessor architecture.
{"title":"Using Babbage's difference engine to introduce computer architecture","authors":"W. Richard","doi":"10.1109/MSE.2017.7945084","DOIUrl":"https://doi.org/10.1109/MSE.2017.7945084","url":null,"abstract":"A new approach to introducing computer architecture in introductory logic design courses based on Babbage's difference engine is described. The difference engine is the thread that students follow from logic design to the concepts associated with a basic load/store microprocessor architecture.","PeriodicalId":339888,"journal":{"name":"2017 IEEE International Conference on Microelectronic Systems Education (MSE)","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115179741","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-11DOI: 10.1109/MSE.2017.7945077
Weiying Zhu
This paper presents our practice of teaching the contemporary ARMv7M architecture and ARM assembly programming, and our experience of using μVision, a professional embedded software development environment, for assembly programming assignments on ARM Cortex-M processor-based systems. ARM architectures are dominantly used in mobile devices and embedded systems [4]. The survey data on the use of μVision and its impact to student learning is also analyzed in this paper. Most of the students are favor of using μVision in this course and agree that the use of μVision has a positive impact to their learning and future careers.
{"title":"Teaching assembly programming for ARM-based microcontrollers in a professional development kit","authors":"Weiying Zhu","doi":"10.1109/MSE.2017.7945077","DOIUrl":"https://doi.org/10.1109/MSE.2017.7945077","url":null,"abstract":"This paper presents our practice of teaching the contemporary ARMv7M architecture and ARM assembly programming, and our experience of using μVision, a professional embedded software development environment, for assembly programming assignments on ARM Cortex-M processor-based systems. ARM architectures are dominantly used in mobile devices and embedded systems [4]. The survey data on the use of μVision and its impact to student learning is also analyzed in this paper. Most of the students are favor of using μVision in this course and agree that the use of μVision has a positive impact to their learning and future careers.","PeriodicalId":339888,"journal":{"name":"2017 IEEE International Conference on Microelectronic Systems Education (MSE)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122948030","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-11DOI: 10.1109/MSE.2017.7945071
L. Clark, V. Vashishtha, D. Harris, Samuel Dietrich, Zunyan Wang
Educators and researchers exploring integrated circuit design methods need models and design flows for advanced integrated circuit processes. As commercial processes have become highly proprietary, predictive technology models fill the gap. This work describes a design flow for ASAP7, the first 7 nm FinFET PDK, including schematic and layout entry, library characterization, synthesis, placement and routing, parasitic extraction, and HSPICE simulation.
{"title":"Design flows and collateral for the ASAP7 7nm FinFET predictive process design kit","authors":"L. Clark, V. Vashishtha, D. Harris, Samuel Dietrich, Zunyan Wang","doi":"10.1109/MSE.2017.7945071","DOIUrl":"https://doi.org/10.1109/MSE.2017.7945071","url":null,"abstract":"Educators and researchers exploring integrated circuit design methods need models and design flows for advanced integrated circuit processes. As commercial processes have become highly proprietary, predictive technology models fill the gap. This work describes a design flow for ASAP7, the first 7 nm FinFET PDK, including schematic and layout entry, library characterization, synthesis, placement and routing, parasitic extraction, and HSPICE simulation.","PeriodicalId":339888,"journal":{"name":"2017 IEEE International Conference on Microelectronic Systems Education (MSE)","volume":"168 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126146392","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-11DOI: 10.1109/MSE.2017.7945083
F. Balasa, Safaa Mohamed
Nowadays, electronic design automation (EDA) is a regular component of computer engineering (CE) curricula. Several EDA problems can be modeled as constrained optimizations, an area where typical CE students have an insufficient background. This paper advocates the teaching of optimization algorithms as a preliminary phase for teaching graduate-level courses on EDA topics. The emphasis should be on practice, rather than theory: this can be achieved by the simultaneous development of an optimization lab using Mathematica - a computational software based on symbolic mathematics.
{"title":"WIP: Optimization algorithms: A key component of EDA education","authors":"F. Balasa, Safaa Mohamed","doi":"10.1109/MSE.2017.7945083","DOIUrl":"https://doi.org/10.1109/MSE.2017.7945083","url":null,"abstract":"Nowadays, electronic design automation (EDA) is a regular component of computer engineering (CE) curricula. Several EDA problems can be modeled as constrained optimizations, an area where typical CE students have an insufficient background. This paper advocates the teaching of optimization algorithms as a preliminary phase for teaching graduate-level courses on EDA topics. The emphasis should be on practice, rather than theory: this can be achieved by the simultaneous development of an optimization lab using Mathematica - a computational software based on symbolic mathematics.","PeriodicalId":339888,"journal":{"name":"2017 IEEE International Conference on Microelectronic Systems Education (MSE)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122107405","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-11DOI: 10.1109/MSE.2017.7945072
R. Thapa, Samira Ataei, J. Stine
This paper describes the design flow of the standard cell characterization on five different technologies and integration of its results with other VLSI tools processes that can be duplicated and implemented for the research and education in the academia. In this proposed work, one design flow is on non-fabricable technology of open-source false-technology FreePDK45 of 45 nm CMOS technology [1]. The other design flows are in the fabricable technology in 0.18 µm, 0.25 µm, 0.35 µm and 0.5 µm. The design flow are automated to simplify the students with intricacy of the tools. This design flows in this work are automated for the tool, Virtuoso Liberate from Cadence Design Systems and students can easily adopt it as part of the VLSI design class curriculum. This characterization flow precisely models the electrical characteristics of the cell that has been subjected to different input variables as explained below. The characterized models are of high demand in other design tools used in between RTL to GDSII process flow.
{"title":"WIP. Open-source standard cell characterization process flow on 45 nm (FreePDK45), 0.18 µm, 0.25 µm, 0.35 µm and 0.5 µm","authors":"R. Thapa, Samira Ataei, J. Stine","doi":"10.1109/MSE.2017.7945072","DOIUrl":"https://doi.org/10.1109/MSE.2017.7945072","url":null,"abstract":"This paper describes the design flow of the standard cell characterization on five different technologies and integration of its results with other VLSI tools processes that can be duplicated and implemented for the research and education in the academia. In this proposed work, one design flow is on non-fabricable technology of open-source false-technology FreePDK45 of 45 nm CMOS technology [1]. The other design flows are in the fabricable technology in 0.18 µm, 0.25 µm, 0.35 µm and 0.5 µm. The design flow are automated to simplify the students with intricacy of the tools. This design flows in this work are automated for the tool, Virtuoso Liberate from Cadence Design Systems and students can easily adopt it as part of the VLSI design class curriculum. This characterization flow precisely models the electrical characteristics of the cell that has been subjected to different input variables as explained below. The characterized models are of high demand in other design tools used in between RTL to GDSII process flow.","PeriodicalId":339888,"journal":{"name":"2017 IEEE International Conference on Microelectronic Systems Education (MSE)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122449188","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-01DOI: 10.1109/MSE.2017.7945082
R. G. Ortego, M. Gil, S. Tzanova, E. Sicard
This article is based on the project “Knowledge Alliance 562206-EPP-1-2015-1-BG-EPPKA2-KA MicroElectronics Cloud Alliance (MECA)”. The MicroElectronics Cloud Alliance (MECA) brings together 18 partners from higher education institutions (HEIs) and enterprises to develop Cloud-based European infrastructure in micro- and nanoelectronics providing a range of open educational resources, remote access as well as sharing educational and professional software, remote and practice-based learning facilities. The project focuses on the joint development of MSc degree-level courses to get the new skills needed for the new jobs in the multidisciplinary sector of micro-nanoelectronics, to be delivered as open educational resources in a cloud-based e-learning environment.
{"title":"Work in progress: MicroElectronics Cloud Alliance: The design of new open educational resources for a educational cloud","authors":"R. G. Ortego, M. Gil, S. Tzanova, E. Sicard","doi":"10.1109/MSE.2017.7945082","DOIUrl":"https://doi.org/10.1109/MSE.2017.7945082","url":null,"abstract":"This article is based on the project “Knowledge Alliance 562206-EPP-1-2015-1-BG-EPPKA2-KA MicroElectronics Cloud Alliance (MECA)”. The MicroElectronics Cloud Alliance (MECA) brings together 18 partners from higher education institutions (HEIs) and enterprises to develop Cloud-based European infrastructure in micro- and nanoelectronics providing a range of open educational resources, remote access as well as sharing educational and professional software, remote and practice-based learning facilities. The project focuses on the joint development of MSc degree-level courses to get the new skills needed for the new jobs in the multidisciplinary sector of micro-nanoelectronics, to be delivered as open educational resources in a cloud-based e-learning environment.","PeriodicalId":339888,"journal":{"name":"2017 IEEE International Conference on Microelectronic Systems Education (MSE)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127341301","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-01DOI: 10.1109/MSE.2017.7945078
J. Nestor
This paper describes a half-semester module in an Introduction to Engineering course that uses microelectronics technology to introduce students to basic ECE concepts and engineering design. The module uses CMOS integrated circuit technology as a vehicle for introducing basic concepts including voltage, current, and logic levels while also providing students with perspective on how integrated circuits are designed and manufactured. It then introduces microelectronics-based technologies including computer processors, microcontrollers, and microcontroller-based “maker” tools including laser cutters and 3D printers. Concepts are reinforced through a series of hands-on lab exercises that include CMOS layout design, simple microcontroller programming with basic I/O devices including switches, LEDs, and solenoids, and physical prototyping. The module culminates with a team design project in which students build a small Arduino-based circuit along with its physical enclosure and mechanical linkages.
{"title":"From microelectronics to making: Incorporating microelectronics in a first-year engineering course","authors":"J. Nestor","doi":"10.1109/MSE.2017.7945078","DOIUrl":"https://doi.org/10.1109/MSE.2017.7945078","url":null,"abstract":"This paper describes a half-semester module in an Introduction to Engineering course that uses microelectronics technology to introduce students to basic ECE concepts and engineering design. The module uses CMOS integrated circuit technology as a vehicle for introducing basic concepts including voltage, current, and logic levels while also providing students with perspective on how integrated circuits are designed and manufactured. It then introduces microelectronics-based technologies including computer processors, microcontrollers, and microcontroller-based “maker” tools including laser cutters and 3D printers. Concepts are reinforced through a series of hands-on lab exercises that include CMOS layout design, simple microcontroller programming with basic I/O devices including switches, LEDs, and solenoids, and physical prototyping. The module culminates with a team design project in which students build a small Arduino-based circuit along with its physical enclosure and mechanical linkages.","PeriodicalId":339888,"journal":{"name":"2017 IEEE International Conference on Microelectronic Systems Education (MSE)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130558310","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-01DOI: 10.1109/MSE.2017.7945074
B. Minch
In this paper, I describe the curricular context and some of the distinctive features of the required sophomore/junior-level required course in microelectronic circuits that I have developed and taught at Olin College over the past eleven years. These features include the use of low-cost portable USB instrumentation for the labs, the coverage of CMOS at all levels of inversion right from the start using a simple, three-parameter Enz-Krummenacher-Vittoz (EKV) model of the long-channel MOS transistor, an emphasis on design-oriented driving-point impedance circuit analysis techniques, and the development of students' circuit reasoning abilities.
{"title":"Teaching microelectronics at Olin College","authors":"B. Minch","doi":"10.1109/MSE.2017.7945074","DOIUrl":"https://doi.org/10.1109/MSE.2017.7945074","url":null,"abstract":"In this paper, I describe the curricular context and some of the distinctive features of the required sophomore/junior-level required course in microelectronic circuits that I have developed and taught at Olin College over the past eleven years. These features include the use of low-cost portable USB instrumentation for the labs, the coverage of CMOS at all levels of inversion right from the start using a simple, three-parameter Enz-Krummenacher-Vittoz (EKV) model of the long-channel MOS transistor, an emphasis on design-oriented driving-point impedance circuit analysis techniques, and the development of students' circuit reasoning abilities.","PeriodicalId":339888,"journal":{"name":"2017 IEEE International Conference on Microelectronic Systems Education (MSE)","volume":"20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125984159","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-05-01DOI: 10.1109/MSE.2017.7945073
J. Hasler, Aishwarya Natarajan, Sahil S. Shah, Sihwan Kim
We present our junior level class implementation moving from classical discrete circuit concept towards system level design. This approach was enabled using large-scale Field Programmable Analog Arrays (FPAA) (ECE 3400). The approach enables a first junior level transistor circuit course to build and verify system level designs. This course heavily utilized remote FPAA designs for their hands-on projects; the resulting class data usage generated by this system gives some information on class behavior. This discussion presents the implementation, analysis, and early assessment data for this first semester class.
{"title":"SoC FPAA immersed junior level circuits course","authors":"J. Hasler, Aishwarya Natarajan, Sahil S. Shah, Sihwan Kim","doi":"10.1109/MSE.2017.7945073","DOIUrl":"https://doi.org/10.1109/MSE.2017.7945073","url":null,"abstract":"We present our junior level class implementation moving from classical discrete circuit concept towards system level design. This approach was enabled using large-scale Field Programmable Analog Arrays (FPAA) (ECE 3400). The approach enables a first junior level transistor circuit course to build and verify system level designs. This course heavily utilized remote FPAA designs for their hands-on projects; the resulting class data usage generated by this system gives some information on class behavior. This discussion presents the implementation, analysis, and early assessment data for this first semester class.","PeriodicalId":339888,"journal":{"name":"2017 IEEE International Conference on Microelectronic Systems Education (MSE)","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123599141","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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