Real-Time Simulation of Permanent Magnet Motor Drive on FPGA Chip for High-Bandwidth Controller Tests and Validation

C. Dufour, S. Abourida, J. Bélanger
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引用次数: 27

Abstract

This paper presents a real-time simulator of a permanent magnet synchronous motor (PMSM) drive implemented on an FPGA card. Real-time simulation of PMSM drives enables rapid deployment and thorough testing of efficient control strategies for vehicular or industrial applications. The PMSM model is based on Park transform with a reference frame on the rotor and assumes sinusoidal flux induction. The PMSM machine in driven by a 3-phase IGBT inverter. Both models are implemented in RT-LAB using a Simulink blockset called Xilinx System Generator (XSG), without any VHDL coding. The paper explains various aspects of the design of the motor drive models in fixed-point representation in XSG, as well as actual simulation validations against a standard PMSM drive model built in Simulink. The PMSM drive is coded along with a test PWM source, built-in the FPGA, with user selectable dead-time, modulation index, source angle offset and frequency. The overall model compilation and simulation is made entirely automatic under the RT-LAB real-time simulation platform. The drive can also run in closed loop with a controller executed on a CPU of the real-time simulator. The final PMSM drive model runs with a 20 ns integration time step, allows for time multiplexing of d-q values and has an input-output latency of 310 ns (250 ns for the PMSM machine alone). The drive is directly connected to RT-LAB digital input and analog outputs (1 microsecond settling time) on the FPGA card and has a resulting total HIL latency of 1.31 microseconds
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基于FPGA芯片的永磁电机驱动实时仿真高带宽控制器测试与验证
提出了一种基于FPGA卡的永磁同步电机驱动实时仿真系统。PMSM驱动器的实时仿真可以快速部署和彻底测试车辆或工业应用的有效控制策略。永磁同步电机模型基于帕克变换,转子上有一个参照系,磁链感应为正弦。永磁同步电机由三相IGBT逆变器驱动。这两个模型都是在RT-LAB中使用名为Xilinx System Generator (XSG)的Simulink块集实现的,没有任何VHDL编码。本文阐述了XSG中定点表示电机驱动模型设计的各个方面,并针对Simulink中建立的标准永磁同步电机驱动模型进行了实际仿真验证。PMSM驱动器与内置FPGA的测试PWM源一起编码,用户可选择死区时间,调制指数,源角偏移和频率。整个模型的编译和仿真在RT-LAB实时仿真平台下完全自动化。驱动器也可以在闭环中运行,控制器在实时模拟器的CPU上执行。最终的PMSM驱动器模型以20 ns的集成时间步长运行,允许d-q值的时间复用,并且输入输出延迟为310 ns(仅PMSM机器为250 ns)。驱动器直接连接到FPGA卡上的RT-LAB数字输入和模拟输出(1微秒的建立时间),产生的总HIL延迟为1.31微秒
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