Design and implementation of Serial ATA pbysical layer on FPGA

Abstract

An increasing number of high-performance computing system developed on FPGA devices need access to mass storage devices for storing data, the serial ATA protocol is widely used in the modern computer systems for transferring data between the host and hard disks or solid-state drives. This paper describes the design and implementation of serial ATA physical layer core based on the Xilinx GTX transceiver. With the method of cyclically changing the GTX line rate, the SATA hard disk with different line rate can be automatically identified and linked, realizing backward compatibility. An embedded system has also been developed for validating the functionality of our SATA physical layer core. We test our physical layer core with connecting our core to both SATA3 and SATA2 hard disks. The experimental result has indicated our core can not only provide the whole functionality required by the SATA physical layer, but also utilize very few logic resources on FPGA.