M. Goto, Y. Honda, T. Watabe, K. Hagiwara, M. Nanba, Yoshinori Iguch, T. Saraya, M. Kobayashi, E. Higurashi, H. Toshiyoshi, T. Hiramoto
{"title":"In-pixel A/D converters with 120-dB dynamic range using event-driven correlated double sampling for stacked SOI image sensors","authors":"M. Goto, Y. Honda, T. Watabe, K. Hagiwara, M. Nanba, Yoshinori Iguch, T. Saraya, M. Kobayashi, E. Higurashi, H. Toshiyoshi, T. Hiramoto","doi":"10.1109/S3S.2016.7804399","DOIUrl":null,"url":null,"abstract":"We report in-pixel analog-to-digital converters (ADCs) using event-driven correlated double sampling (CDS) for stacked silicon-on-insulator (SOI) image sensors. The pulse-frequency-modulation ADCs enable a pixel-parallel operation that leads to superior imaging performance. We designed a novel CDS for an ADC comprising comparators, capacitors, and timing control logic circuits to generate clocks for in-pixel operation to suppress reset noise. The developed ADC is successfully confirmed to exhibit an excellent linearity in a wide dynamic range of 120 dB and it shows noise reduction effects, indicating the feasibility of high-performance pixel-level imaging for next-generation image sensors.","PeriodicalId":145660,"journal":{"name":"2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)","volume":"114 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/S3S.2016.7804399","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 4
Abstract
We report in-pixel analog-to-digital converters (ADCs) using event-driven correlated double sampling (CDS) for stacked silicon-on-insulator (SOI) image sensors. The pulse-frequency-modulation ADCs enable a pixel-parallel operation that leads to superior imaging performance. We designed a novel CDS for an ADC comprising comparators, capacitors, and timing control logic circuits to generate clocks for in-pixel operation to suppress reset noise. The developed ADC is successfully confirmed to exhibit an excellent linearity in a wide dynamic range of 120 dB and it shows noise reduction effects, indicating the feasibility of high-performance pixel-level imaging for next-generation image sensors.