{"title":"A 16.3-GHz 64:1 CMOS frequency divider","authors":"M. Nogawa, Y. Ohtomo","doi":"10.1109/APASIC.2000.896917","DOIUrl":null,"url":null,"abstract":"A new high-speed dynamic CMOS frequency divider that operates at frequencies of over 16 GHz is proposed. The core of the proposed 2:1 divider consists of only three inverters and one transmission gate, and it has no DC current. Using the 2:1 divider, we developed a 64:1 divider with 0.2-/spl mu/m CMOS/SIMOX technology. Experimental results show that the maximum input frequency of the proposed divider is 1.4 times as high as that of a conventional one. The proposed 64:1 divider has a high input frequency of 16.3 GHz with a power consumption of 45 mW at 2.0-V power supply, and a low power consumption of 2.0 mW with a input frequency of 7.0 GHz at 0.8-V power supply.","PeriodicalId":313978,"journal":{"name":"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-08-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APASIC.2000.896917","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
Abstract
A new high-speed dynamic CMOS frequency divider that operates at frequencies of over 16 GHz is proposed. The core of the proposed 2:1 divider consists of only three inverters and one transmission gate, and it has no DC current. Using the 2:1 divider, we developed a 64:1 divider with 0.2-/spl mu/m CMOS/SIMOX technology. Experimental results show that the maximum input frequency of the proposed divider is 1.4 times as high as that of a conventional one. The proposed 64:1 divider has a high input frequency of 16.3 GHz with a power consumption of 45 mW at 2.0-V power supply, and a low power consumption of 2.0 mW with a input frequency of 7.0 GHz at 0.8-V power supply.