Application of phase-shifting mask technology to 0.17/spl mu/m-gate GaAs MESFET for ultra high speed IC's

T. Ohshima, N. Yamamoto, T. Ichioka, T. Kimura, Y. Sano
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引用次数: 3

Abstract

Then W-Al was anisotropically etched by the electron cyclotron resonance (ECR) plasma using the Al pattern as a mask, where the difference between the resist spacing and the gate length was less than 0.02pm. A standard deviation of 0.17pm W-AI gate pattern obtained was as small as 0.019pm (9.5%) over a 3-inch wafer. After the gate formation, ion implantations of Si and C were performed to form n+-region and buried p-region which were self-aligned to the gate. This structure successfilly suppressed the short channel effect without sacrificing its high speed performance, namely, without increasing the parasitic capacitance. Fabricated 0.17pm-gate GaAs MESFETs have shown the averaged maximum transconductance of 622mmS/mm with the standard deviation of lOmmS/mm (1.6%) at the drain voltage of 1V. The uniformity of the threshold voltage was also good, and the standard deviation was 28mV over a 3-inch wafer. The DCFL (Direct-Coupled FET Logic) inverter implemented by this device has shown a propagation delay of 10.4pdgate with a power dissipation of 2.34mW/gate at the supply voltage of 2V as averaged values over a 3-inch wafer. These standard deviations were 0.28ps/gate (2.7%) and 0.053mW/gate (2.3%), respectively. As the highest value, we have observed the propagation delay of 7.6pdgate at a supply voltage of 1OV. Using this device we have fabricated 8: 1 multiplexer and 1 :8 demultiplexer, and obtained a stable operation at lOGb/s at a power dissipation as low as 1.5W and 2.0W, respectively. The demultiplexer has operated even at 14Gb/s, which is one of the best results ever reported. A yield of these IC's was over 50%, which was due to the high uniformity in the characteristics of the MESFETs. Finally, we have confirmed that the fabrication process of 0.17pm-gate GaAs MESFET based on the phase-shifting mask technology is promising for the ultra high speed digital IC application. Next, Al was evaporated and lifted-off
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超高速集成电路中0.17/spl μ m栅极GaAs MESFET移相掩膜技术的应用
然后用电子回旋共振(ECR)等离子体以Al图案作为掩膜对W-Al进行各向异性刻蚀,其电阻间距和栅极长度的差值小于0.02pm。在3英寸晶圆上得到的W-AI栅极图样的标准偏差为0.17pm,仅为0.019pm(9.5%)。栅极形成后,Si和C离子注入形成与栅极自对准的n+区和埋藏p区。这种结构成功地抑制了短通道效应,而不牺牲其高速性能,即不增加寄生电容。在漏极电压为1V时,制备的0.17pm栅极GaAs mesfet的平均最大跨导为622mm /mm,标准差为lOmmS/mm(1.6%)。阈值电压的均匀性也很好,在3英寸晶圆上的标准差为28mV。该器件实现的DCFL(直接耦合FET逻辑)逆变器在3英寸晶圆上的供电电压为2V时的传播延迟为10.4pdgate,功耗为2.34mW/gate。这些标准差分别为0.28ps/栅极(2.7%)和0.053mW/栅极(2.3%)。在电源电压为1v时,我们观察到7.6pdgate的传输延迟为最高值。利用该器件,我们制作了8:1的复用器和1:8的解复用器,并在功耗低至1.5W和2.0W的情况下,以lOGb/s的速度稳定工作。解复用器甚至以14Gb/s的速度运行,这是有史以来最好的结果之一。这些集成电路的产率超过50%,这是由于mesfet特性的高度均匀性。最后,我们证实了基于移相掩膜技术的0.17pm栅极GaAs MESFET的制造工艺在超高速数字IC应用中是有前景的。接下来,艾尔被蒸发并被举起
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