Sub-Sampling Phase-Locked Loop with Ultra-mini Dead Zone For Locking Time Reduction

Yeqing Wang, Zhouchen Ma, Yan Liu, Jian Zhao, Lei Zhang, Zongmin Wang
{"title":"Sub-Sampling Phase-Locked Loop with Ultra-mini Dead Zone For Locking Time Reduction","authors":"Yeqing Wang, Zhouchen Ma, Yan Liu, Jian Zhao, Lei Zhang, Zongmin Wang","doi":"10.1109/APCCAS50809.2020.9301713","DOIUrl":null,"url":null,"abstract":"This paper presents a sub-sampling phase-locked loop with shorter locking time. An ultra-mini dead zone is proposed to increase the operation region of the high-gain frequency-locked loop, such that a fast settling can be achieved. A phase error adaptive charging pump control scheme is implemented to tune the phase/frequency detector’s outputs according to the remaining phase error. Simulation results show that it takes 2.5 μs for the system to settle down. When a step change of 100 or 500 mV is applied on the control voltage of the voltage-controlled oscillator, it takes 2 μs or 1.25 μs for the system to re-lock. When the divider ratio is reduced from 44 to 43, it takes 2 μs for the system to return to the locking state.","PeriodicalId":127075,"journal":{"name":"2020 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS50809.2020.9301713","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1

Abstract

This paper presents a sub-sampling phase-locked loop with shorter locking time. An ultra-mini dead zone is proposed to increase the operation region of the high-gain frequency-locked loop, such that a fast settling can be achieved. A phase error adaptive charging pump control scheme is implemented to tune the phase/frequency detector’s outputs according to the remaining phase error. Simulation results show that it takes 2.5 μs for the system to settle down. When a step change of 100 or 500 mV is applied on the control voltage of the voltage-controlled oscillator, it takes 2 μs or 1.25 μs for the system to re-lock. When the divider ratio is reduced from 44 to 43, it takes 2 μs for the system to return to the locking state.
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
带超小死区的子采样锁相环可减少锁相时间
本文提出了一种锁相时间较短的次采样锁相环。提出了一个超小死区来增加高增益锁频环的工作区域,从而实现快速稳定。采用相位误差自适应充电泵控制方案,根据剩余的相位误差对相位/频率检测器的输出进行调整。仿真结果表明,该系统的稳定时间为2.5 μs。当对压控振荡器的控制电压施加100或500 mV的阶跃变化时,系统需要2 μs或1.25 μs才能重新锁定。当分频比从44降低到43时,系统恢复到锁定状态需要2 μs。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
"Truth from Practice, Learning beyond Teaching" Exploration in Teaching Analog Integrated Circuit 100 MHz Random Number Generator Design Using Interleaved Metastable NAND/NOR Latches* Performance Analysis of Non-Profiled Side Channel Attacks Based on Convolutional Neural Networks A Self-coupled DT MASH ΔΣ Modulator with High Tolerance to Noise Leakage An Energy-Efficient Time-Domain Binary Neural Network Accelerator with Error-Detection in 28nm CMOS
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1