Yeqing Wang, Zhouchen Ma, Yan Liu, Jian Zhao, Lei Zhang, Zongmin Wang
{"title":"Sub-Sampling Phase-Locked Loop with Ultra-mini Dead Zone For Locking Time Reduction","authors":"Yeqing Wang, Zhouchen Ma, Yan Liu, Jian Zhao, Lei Zhang, Zongmin Wang","doi":"10.1109/APCCAS50809.2020.9301713","DOIUrl":null,"url":null,"abstract":"This paper presents a sub-sampling phase-locked loop with shorter locking time. An ultra-mini dead zone is proposed to increase the operation region of the high-gain frequency-locked loop, such that a fast settling can be achieved. A phase error adaptive charging pump control scheme is implemented to tune the phase/frequency detector’s outputs according to the remaining phase error. Simulation results show that it takes 2.5 μs for the system to settle down. When a step change of 100 or 500 mV is applied on the control voltage of the voltage-controlled oscillator, it takes 2 μs or 1.25 μs for the system to re-lock. When the divider ratio is reduced from 44 to 43, it takes 2 μs for the system to return to the locking state.","PeriodicalId":127075,"journal":{"name":"2020 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APCCAS50809.2020.9301713","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 1
Abstract
This paper presents a sub-sampling phase-locked loop with shorter locking time. An ultra-mini dead zone is proposed to increase the operation region of the high-gain frequency-locked loop, such that a fast settling can be achieved. A phase error adaptive charging pump control scheme is implemented to tune the phase/frequency detector’s outputs according to the remaining phase error. Simulation results show that it takes 2.5 μs for the system to settle down. When a step change of 100 or 500 mV is applied on the control voltage of the voltage-controlled oscillator, it takes 2 μs or 1.25 μs for the system to re-lock. When the divider ratio is reduced from 44 to 43, it takes 2 μs for the system to return to the locking state.