Exploration of multiple ICEs for embedded microprocessor cores in an SoC chip

Ing-Jer Huang, Chung-Fu Kao
{"title":"Exploration of multiple ICEs for embedded microprocessor cores in an SoC chip","authors":"Ing-Jer Huang, Chung-Fu Kao","doi":"10.1109/APASIC.2000.896970","DOIUrl":null,"url":null,"abstract":"This paper explores architectural alternatives in the integration of embedded in-circuit emulation into a SoC (System-on-Chip) chip with multiple microprocessor (microcontroller) cores. The alternatives include distributed, centralized and hierarchical styles. Advantages and disadvantages of these alternatives are analyzed.","PeriodicalId":313978,"journal":{"name":"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-08-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APASIC.2000.896970","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 3

Abstract

This paper explores architectural alternatives in the integration of embedded in-circuit emulation into a SoC (System-on-Chip) chip with multiple microprocessor (microcontroller) cores. The alternatives include distributed, centralized and hierarchical styles. Advantages and disadvantages of these alternatives are analyzed.
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探索在SoC芯片中嵌入微处理器核心的多个集成电路
本文探讨了将嵌入式电路仿真集成到具有多个微处理器(微控制器)内核的SoC(片上系统)芯片中的架构替代方案。备选方案包括分布式、集中式和分层样式。分析了这些替代方案的优缺点。
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