{"title":"A novel architecture and processor-level design based on a new matching criterion for video compression","authors":"Hangu Yeo, Y. Hu","doi":"10.1109/VLSISP.1996.558378","DOIUrl":null,"url":null,"abstract":"In this paper, architectures which can support the block-based real time motion estimation of video signals using various search methods have been presented. The design efforts are focused on the processor-level design with a new matching criterion. With the new binary level matching criterion which performs a bit-wise comparison instead of the conventional eight-bit addition/subtraction, we could achieve a simple processor-level design with fewer input/output lines and lower power consumption.","PeriodicalId":290885,"journal":{"name":"VLSI Signal Processing, IX","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"VLSI Signal Processing, IX","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSISP.1996.558378","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 10
Abstract
In this paper, architectures which can support the block-based real time motion estimation of video signals using various search methods have been presented. The design efforts are focused on the processor-level design with a new matching criterion. With the new binary level matching criterion which performs a bit-wise comparison instead of the conventional eight-bit addition/subtraction, we could achieve a simple processor-level design with fewer input/output lines and lower power consumption.
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