Low-Frequency Non-Separable Transform Hardware System Design for the VVC Encoder

Abstract

This paper presents a dedicated hardware system design for the Low-Frequency Non-Separable Transform (LFNST) of the Versatile Video Coding (VVC/H.266) standard. The LFNST is a secondary transform used to transform the coefficients that came from the DCT-II transform. The developed design exploits two clock domains, where the LFNST core is working at 746.48 MHz and the primary transform can operate at a slower clock of only 186.62MHz to be able to process Ultra-High Definition (UHD) videos with $4098\times 2160$ pixels (4K) at 60 frames per second. The whole LFNST hardware system design presents an area utilization of 57.3 Kgates and a power dissipation of 32.22 mW (processing the LFNST $4\times 4$ through TU size of $4\times 4$) when synthesized for an ASIC implementation with a 40nm technology standard cells library.