A review report on low power VLSI systems analysis and modeling techniques

Abstract

In the present trend of CMOS IC technology, Low Power Design is a major issue in designing of a system. In order to achieve that criterion, power consumption should be minimized. In this paper, techniques which are available for reduction of power consumption at different abstraction levels are discussed in detail. With this paper, Designer can easily choose the proper methodology with the appropriate optimization technique to achieve the required goal.