The Icewater Language and Interpreter

Abstract

A symbolic circuit design language for describing the topology and topography of a VLSI design in a simple and hierarchical manner is described. The language was intended to provide a simple manner of structuring a VLSI design, based on the Mead and Conway design methodology. Cells may be constructed from other cells and technology specific devices. Terminals for interconnecting cells are explicitly named, and may be accessed in a symbolic fashion from the language. The restriction of methods of interconnecting cells to simple abutment and specific wiring provides a simple and clear method of maintaining the connectivity of the design. The methodology proposed obviates the need for overly complex geometrical design rules. Other tools will provide design compaction, mask generation, and circuit extraction using a technology specific database and the design description.